(1) Field of the Invention
This invention relates to fabrication processes used to manufacture Read Only Memory devices, and more specifically to a method used to optimize the critical code ion implantation step.
(2) Description of Prior Art
Read Only Memory, (ROM), structures have been successfully employed as nonvolatile semiconductor memory devices. Most ROM designs and processes usually can be described by three elements. First, buried bit lines are placed in a silicon substrate. The bit lines usually are heavily doped regions, opposite in conductivity type then the substrate. Next word lines, usually polysilicon, are placed on gate oxide layers, perpendicular to the buried bit lines. Finally, a specific channel region, arising from the intersection of the bit and word lines, is selectively programmed to electrically respond differently then intersections that have not received the programmed treatment. The programmable cell, as it is normally referred to, can be created either prior to, or after the fabrication of the polysilicon word line. The programmable cell can be achieved via many techniques. For example, the programmable cell can be fabricated using a thicker or thinner gate oxide then the rest of the cells, and thus respond differently electrically. Another example of a programmable cell, described by Hong in U.S. Pat. No. 5,308,777 shows enhancement mode channel regions, that is p type channels, with n type source and drains. In this case the inventor alters the channel region by ion implanting concentrations of p type impurities, higher in doping level then doping levels found in the non-altered cells, thus resulting in the desired differences in electrical responses.
In this invention a process used to fabricate depletion mode ROM devices will be described. The programmable cell will be obtained by selectively ion implanting a specific cell, created by the intersection of n type bit lines, and polysilicon word lines. The ion implantation will also be n type, to achieve the depletion mode ROM device. However for this case the implantation will be performed through the already patterned polysilicon lines. This invention will also teach the semiconductor fabrication processes needed to achieve the optimum electrical response for the depletion mode ROM device.